Higher integration level of integrated circuits (ICs) have resulted semiconductor devices to have decreasing sizes. As the semiconductor devices have developed to have higher distribution density and smaller sizes, metal-oxide-semiconductor (MOS) devices have become a main driving force of the semiconductor technology. For example, complementary metal-oxide-semiconductor (CMOS) transistors make up a main basic element/unit in logic circuits nowadays. A CMOS transistor circuit often includes P-type MOS (PMOS) transistors and N-type MOS (NMOS) transistors. A PMOS transistor or an NMOS transistor is often disposed on a doped well. A PMOS transistor (or an NMOS transistor) often includes a gate electrode, a P-type (or an N-type) source/drain electrode in the substrate on two sides of the gate electrode, and a channel region between the source electrode and the drain electrode.
In existing semiconductor technology, the formation of a PMOS/an NMOS transistor with predictable/desired performance often includes controlling the formation of the gate oxide layer, the channel region, the well region, and the pocket implantation region. The formation of a PMOS transistor/an NMOS transistor also includes controlling the doping profile of the extended source/drain region and the implantation profile of the source/drain electrode, and controlling the thermal budget of the fabrication process. To obtain a PMOS/an NMOS transistor with desired performance, the two most common ways include tuning certain implantation properties of the dopant ions, e.g., implantation type, implantation energy, and implantation dose/concentration, and changing/adjusting the thickness of the gate oxide layer. The two most common ways both require forming doped wells in the semiconductor structure. The formation of the doped wells requires illumination with light of different intensities/types and related photolithography processes for defining doped wells for different parts of the semiconductor structure.
As a result, the fabrication of the semiconductor structure becomes undesirably complicated. The disclosed semiconductor structure and fabricating method are directed to solve one or more problems set forth above and other problems.